Samsung promises 2018 Tbit NAND

Z-NAND samples at 15ms latency.

Samsung sketched out plans for a Tbit 3D-NAND chip that it will ship next year as well as dense solid-state drives using its current chips. The company also said that it is sampling the Z-NAND products announced last year at latency levels that match or beat Intel's 3DXP memories.

Samsung's Tbit NAND will support data rates up to 1.2Gbps and pack four TB in a package that stacks 32 dies. The chip will embed peripheral circuits in a new metal bonding layer at the bottom of a cell stack as one way to hit the new density level, said Kye Hyun Kyung, Samsung's executive vice president of flash products and technology, in a talk at the company's Silicon Valley headquarters.

The news was part of Samsung's keynote at the Flash Memory Summit, where some rivals described chips using 96 layers and four bits per cell. Samsung's current 512-Gbit chips use nine vertical channels and 64 layers built in a descending stair fashion for stability, up from four channels and 48 layers in the prior generation.

Kyung said that versions of 3D-NAND with up to four bits per cell will fill most of the industry's nonvolatile memory needs. However, he said that the South Korea giant has been working as early as 2002 on versions of magnetic and phase-change memories with sub-microsecond latencies that it will eventually ship to help plug gaps between NAND and DRAM.

Meanwhile, Samsung is sampling users, including NetApp and Datera SSDs based on its Z-NAND chips that deliver 15ms latency. The chips use sense amps optimized solely for latency, run at data rates up to 800Mbps, and target data centers running analytics and caching programs.

Samsung is working on a second-generation Z-NAND supporting two bits per cell. The chips are aimed to be more affordable, although their read latency is expected to nudge up slightly.

To read the full article, go to EETimes.