Samsung targets 4nm in 2020

Samsung is working on an 8nm LPP process this year and a 7nm process for 2018.

Samsung Electronics Co. Ltd has updated its foundry technology roadmap, which includes detailing its second-generation FD-SOI platform, several bulk silicon FinFET processes down to 5nm and a 4nm "post FinFET" structure process set to be in risk production in 2020.

Samsung, which formally broke its foundry operation into a separate business unit called Samsung Foundry recently, also reiterated previously announced plans to put EUV lithography into production in 2018 at the 7nm node.

"We are extremely aggressive with our roadmap, not only in planning, but in announcing what we are going to be doing in the next three to four years," said Kelvin Low, senior director of foundry marketing at Samsung, in an interview ahead of the announcement.

The most forward-looking of Samsung's announcements, which were unveiled at the company's annual US foundry technology forum in Santa Clara, California, is the company's proprietary next-generation device architecture, which it calls multibridge channel FET or MBCFET. The structure is described as Samsung's own proprietary flavor of gate-all-around FET or GAAFET technology, which uses a nanosheet device to overcome the physical scaling and performance limitations of the FinFET architecture.

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